A Fast Register Relocation Method for Circuit Size Reduction in Generalized-Synchronous Framework.
Yukihide KohiraAtsushi TakahashiPublished in: ISCAS (2007)
Keyphrases
- main contribution
- detection method
- pairwise
- cost function
- experimental evaluation
- computational cost
- high accuracy
- fully automatic
- synthetic data
- theoretical analysis
- mutual information
- support vector machine
- significant improvement
- learning algorithm
- data sets
- high speed
- evolutionary algorithm
- image quality
- computational complexity
- objective function
- support vector machine svm
- clustering method
- multiscale
- similarity measure
- segmentation method
- high precision