Boosting performance of directory-based cache coherence protocols with coherence bypass at subpage granularity and a novel on-chip page table.
Mohammadreza SoltaniyehIsmail KadayifÖzcan ÖzturkPublished in: Conf. Computing Frontiers (2016)
Keyphrases
- website
- web pages
- high speed
- analog vlsi
- low cost
- ensemble learning
- high density
- single chip
- metadata
- hierarchical structure
- database
- ensemble methods
- html documents
- learning algorithm
- communication protocols
- physical design
- page layout
- virtual memory
- vlsi implementation
- buffer size
- security protocols
- replacement policy
- web directories
- communication protocol
- circuit design
- base classifiers
- keywords
- information retrieval