Utilization of multi-bit flip-flops for clock power reduction.

Zhi-Wei Chen Jin-Tai Yan

Published in: ICECS (2012)

Keyphrases

power dissipation
flip flops
power consumption
power reduction
low power
clock gating
power saving
high speed
cmos technology
energy efficiency
energy saving
data model
data center
finite state machines
case study
low cost