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Low-power logic styles for full-adder circuits.
José M. Quintana
Maria J. Avedillo
Raúl Jiménez
Esther Rodríguez-Villegas
Published in:
ICECS (2001)
Keyphrases
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logic circuits
low power
low cost
power consumption
high speed
logic synthesis
power dissipation
delay insensitive
high power
single chip
wireless transmission
vlsi architecture
digital signal processing
gate array
chip design
cmos technology
vlsi circuits
real time
power reduction
energy dissipation
image sensor