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Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level.

Lucas BrusamarelloRoberto da SilvaGilson I. WirthRicardo A. L. Reis
Published in: VLSI-SoC (2007)
Keyphrases
  • error propagation
  • logic circuits
  • error resilience
  • low power
  • coding efficiency
  • video quality
  • image coding
  • real time
  • image sequences
  • power consumption
  • power dissipation