Architecture optimizations for synchronization and communication on chip multiprocessors.
Sevin FideStephen F. JenksPublished in: IPDPS (2008)
Keyphrases
- multithreading
- parallel computing
- parallel architecture
- vlsi implementation
- analog vlsi
- communication protocol
- communication protocols
- computational power
- high speed
- distributed memory
- highly efficient
- interprocess communication
- high bandwidth
- real time
- communication networks
- shared memory
- network architecture
- host computer
- low power
- phase locked loop
- cmos image sensor
- command and control
- memory access
- high density
- tcp ip
- communication systems
- parallel implementation