Static Noise Margin in 16 nm FinFET 6T and 8T SRAM Cells for Compute-in-Memory.
Lorenzo StevenazziAndrea BaschirottoMarcello De MatteisPublished in: ICECS (2023)
Keyphrases
- random access memory
- dynamic random access memory
- noisy data
- missing data
- memory requirements
- random noise
- power consumption
- memory space
- signal to noise ratio
- noise model
- noise level
- cmos technology
- image noise
- memory usage
- low voltage
- embedded dram
- noise reduction
- main memory
- database management systems
- data transmission
- memory size
- maximum margin
- objective function
- associative memory
- training set