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A 40-nm 646.6TOPS/W Sparsity-Scaling DNN Processor for On-Device Training.
Zih-Sing Fu
Yu-Chi Lee
Alex Park
Chia-Hsiang Yang
Published in:
VLSI Technology and Circuits (2022)
Keyphrases
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training process
training phase
high speed
training algorithm
high dimensional
training samples
read write
real time
database systems
training data
training set
parallel processing
multi core processors