A 0.5-5 GHz 0.3-mW 50% duty-cycle corrector in 65-nm CMOS.

Jiaqi Zhang Xiangyu Meng

Published in: TENCON (2020)

Keyphrases

duty cycle
clock frequency
power consumption
cmos technology
nm technology
low power
energy efficiency
power dissipation
low voltage
silicon on insulator
parallel processing
high speed
digital signal processing