RECFEC: A Reconfigurable FEC Processor for Viterbi, Turbo, Reed-Solomon and LDPC Coding.
Afshin NiktashHooman PariziAmir Hosein KamalizadNader BagherzadehPublished in: WCNC (2008)
Keyphrases
- turbo codes
- channel coding
- reed solomon
- error correction
- scalable video
- error control
- distributed video coding
- packet loss
- error detection
- wireless channels
- unequal error protection
- video transmission
- error propagation
- video quality
- source coding
- bit error rate
- compressed images
- error resilient
- end to end
- error resilience
- video codec
- low complexity
- rate allocation
- bitstream
- multiple description coding
- computer simulation
- video coding
- multiple description
- transform domain
- image transmission
- wireless communication
- video compression
- bit errors