Static analysis and family-based model checking with VMC.
Maurice H. ter BeekFranco MazzantiFerruccio DamianiLuca PaoliniGiordano ScarsoMichael LienhardtPublished in: SPLC (A) (2021)
Keyphrases
- model checking
- static analysis
- dynamic analysis
- abstract interpretation
- temporal logic
- source code
- formal verification
- formal specification
- model checker
- automated verification
- temporal properties
- formal methods
- reachability analysis
- timed automata
- verification method
- computation tree logic
- epistemic logic
- test suite
- pspace complete
- symbolic model checking
- transition systems
- regular expressions
- asynchronous circuits
- databases
- knowledge base
- process algebra
- linear temporal logic
- bounded model checking
- planning domains
- high level