CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation.
Nathan RousselOliver PotinGregory di PendinaJean-Max DutertreJean-Baptiste RigaudPublished in: ICECS 2022 (2022)
Keyphrases
- hardware implementation
- power consumption
- efficient implementation
- signal processing
- software implementation
- data mining
- dedicated hardware
- low cost
- machine learning
- hardware design
- design considerations
- image processing algorithms
- field programmable gate array
- high speed
- memory management
- feature extraction
- random access memory
- pipeline architecture