Investigation on negative capacitance FinEFT beyond 7 nm node from device to circuit.
Jiali HuoWeixing HuangFan ZhangShengli ZhangWeizhuo GanQiang HuoYuwei CaiQingzhu ZhangYongliang LiHuilong ZhuHuaxiang YinZhenhua WuPublished in: Microelectron. J. (2021)
Keyphrases
- high speed
- metal oxide semiconductor
- silicon on insulator
- cmos technology
- low power
- power dissipation
- semiconductor devices
- clock gating
- positive and negative
- power consumption
- data acquisition
- low cost
- graph structure
- circuit design
- integrated circuit
- directed graph
- digital forensics
- equivalent circuit
- unit length
- parallel processing
- high frequency
- image sensor
- transmission line
- analog circuits
- power reduction
- nm technology