Low-power bit-serial Viterbi decoder for 3rd generation W-CDMA systems.

Hiroshi Suzuki Yun-Nan Chang Keshab K. Parhi

Published in: CICC (1999)

Keyphrases

low power
cdma systems
power consumption
low cost
high speed
low density parity check
low complexity
vlsi architecture
channel estimation
decoding algorithm
real time
code division multiple access
mixed signal
motion estimation
error concealment