A low-power CMOS analog multiplier.
Chunhong ChenZheng LiPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2006)
Keyphrases
- low power
- mixed signal
- vlsi architecture
- vlsi circuits
- power consumption
- high speed
- cmos image sensor
- low cost
- single chip
- cmos technology
- wide dynamic range
- focal plane
- floating point
- high power
- wireless transmission
- image sensor
- analog vlsi
- analog to digital converter
- digital signal processing
- low power consumption
- multi channel
- hardware implementation
- ultra low power
- gate array
- signal processor
- image processing
- delay insensitive
- power reduction
- circuit design