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Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings.

Abhishek PatyalHung-Ming ChenMark Po-Hung LinGuan-Qi FangSimon Yi-Hung Chen
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2023)
Keyphrases
  • data sets
  • real time
  • real world
  • information retrieval
  • similarity measure
  • texture synthesis
  • program synthesis
  • analog vlsi