A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS.

S. M. Yasser Sherazi Peter Nilsson Henrik Sjöland Joachim Neves Rodrigues

Published in: ICECS (2012)

Keyphrases

cmos technology
low pass filter
silicon on insulator
nm technology
low cost
noise reduction
high speed
signal processing
preprocessing step
filtering algorithm
real time
circuit design
metal oxide semiconductor
image sensor
frequency domain analysis
power supply
power consumption
image processing