Truncated SIMD Multiplier Architecture for Approximate Computing in Low-Power Programmable Processors.
Roberto R. OsorioGabriel RodríguezPublished in: IEEE Access (2019)
Keyphrases
- low power
- signal processor
- processor array
- low cost
- high speed
- power consumption
- single chip
- vlsi architecture
- parallel algorithm
- single instruction multiple data
- signal processing
- parallel implementation
- mesh connected
- high power
- wireless transmission
- hardware implementation
- logic circuits
- parallel processing
- digital signal processing
- parallel computers
- massively parallel
- cmos technology
- processing elements
- gate array
- vlsi circuits
- low power consumption
- power dissipation
- power reduction
- array processor
- nm technology
- mixed signal
- parallel architectures
- design considerations
- floating point