Login / Signup
Efficient in-system RTL verification and debugging using FPGAs (abstract only).
Proshanta Saha
Chuck Haymes
Ralph Bellofatto
Bernard Brezzo
Mohit Kapur
Sameh W. Asaad
Published in:
FPGA (2012)
Keyphrases
</>
model based diagnosis
similarity measure
neural network
data mining
information retrieval
genetic algorithm
cost effective
computationally expensive
parallel architectures