A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs.
Si-Nai KimWoo-Cheol KimMin-Jae SeoSeung-Tak RyuPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2018)
Keyphrases
- nm technology
- gray code
- random access memory
- binary representation
- logical operations
- cmos technology
- metal oxide semiconductor
- low cost
- power consumption
- low power
- silicon on insulator
- high speed
- bit string
- analog to digital converter
- low voltage
- error correcting codes
- dacs scheme
- non binary
- hamming distance
- video sequences
- real time