A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV.
Song WangBing YuWenwu XiaoFujun BaiXiaodong LongLiang BaiXuerong JiaFengguo ZuoJie TanYixin GuoPeng SunJun ZhouQiong ZhanSheng HuYu ZhouYi KangQiwei RenXiping JiangPublished in: VLSI Technology and Circuits (2023)