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A signal degradation reduction method for memristor ratioed logic (MRL) gates.

Bosheng LiuYing WangZhiqiang YouYinhe HanXiaowei Li
Published in: IEICE Electron. Express (2015)
Keyphrases
  • reduction method
  • quantum mechanics
  • logic circuits
  • selection algorithm
  • search algorithm
  • training set
  • fuzzy logic