An Architecture to Enable Lifetime Full Chip Testability in Chip Multiprocessors.
Rance RodriguesIsrael KorenSandip KunduPublished in: PACT (2011)
Keyphrases
- low cost
- high speed
- vlsi implementation
- analog vlsi
- physical design
- programmable logic
- high density
- evolvable hardware
- single chip
- vlsi design
- multithreading
- solid models
- circuit design
- design methodology
- ibm power processor
- chip design
- host computer
- neural network
- modular design
- cmos technology
- printed circuit boards
- image sensor
- evolutionary algorithm