A probabilistically analysable cache implementation on FPGA.
Hassan AnwarChao ChenGiovanni BeltramePublished in: NEWCAS (2015)
Keyphrases
- hardware implementation
- hardware architecture
- hardware architectures
- software implementation
- main memory
- field programmable gate array
- fpga technology
- hardware design
- real time
- efficient implementation
- high speed
- low cost
- computing systems
- parallel architecture
- operating system
- signal processing
- hit rate
- dedicated hardware