Ein 32-Bit-Rechenwerk mit eingebautem Hardware-Selbsttest.
G. GrasslWilfried DaehnU. LudemannUlrich TheusPublished in: Fehlertolerierende Rechensysteme (1982)
Keyphrases
- random number generator
- hardware and software
- real time
- low cost
- vlsi implementation
- test set
- protection schemes
- protection scheme
- address space
- computing power
- random number
- massively parallel
- image processing
- computing systems
- computer architecture
- processing capabilities
- hardware architecture
- hardware implementation
- data acquisition
- computer systems
- motion estimation
- integer arithmetic
- bit parallel
- video sequences