Digital CMOS logic operation in the sub-threshold region.
Hendrawan SoelemanKaushik RoyPublished in: ACM Great Lakes Symposium on VLSI (2000)
Keyphrases
- circuit design
- delay insensitive
- cmos image sensor
- logical operations
- charge coupled devices
- chip design
- random access memory
- digital circuits
- low power
- low cost
- power consumption
- automated reasoning
- multi valued
- threshold selection
- real time
- mixed signal
- asynchronous circuits
- digital curves
- deontic logic
- digital media
- region of interest
- digital technologies
- vlsi circuits
- logic programming
- logical framework