Performance improvement of elliptic curve cryptography system using low power, high speed 16 × 16 Vedic multiplier based on reversible logic.
S. KarthikeyanM. JagadeeswariPublished in: J. Ambient Intell. Humaniz. Comput. (2021)
Keyphrases
- low power
- high speed
- elliptic curve cryptography
- logic circuits
- delay insensitive
- low cost
- elliptic curve
- power consumption
- digital signal processing
- security analysis
- authentication scheme
- public key
- high security
- error correction
- real time
- digital watermark
- hardware implementation
- frame rate
- ultra low power
- cmos technology
- power dissipation
- digital circuits
- wireless sensor networks