Memory Organization of a Single-Chip Video Signal Processing System with Embedded DRAM.
Jörg HilgenstockKlaus HerrmannPeter PirschPublished in: Great Lakes Symposium on VLSI (1999)
Keyphrases
- single chip
- signal processing
- low power
- embedded dram
- random access memory
- low cost
- video sequences
- image sensor
- image processing
- dynamic random access memory
- computer vision
- video data
- multimedia
- video frames
- digital signal processing
- memory subsystem
- real time
- video content
- power consumption
- space time
- image enhancement
- power dissipation
- cmos technology
- low power consumption
- pattern recognition