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Analysis and Optimization of Nanometer CMOS Circuits for Soft-Error Tolerance.
Yuvraj Singh Dhillon
Abdulkadir Utku Diril
Abhijit Chatterjee
Adit D. Singh
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2006)
Keyphrases
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high speed
error tolerance
vlsi circuits
machine learning
decision trees
statistical analysis
image coding
delay insensitive