Hardware architecture for lossless image compression based on context-based modeling and arithmetic coding.
Xiaolin ChenNishan CanagarajahJosé Luis Núñez-YáñezRaffaele VitulliPublished in: SoCC (2007)
Keyphrases
- lossless image compression
- arithmetic coding
- hardware architecture
- image compression
- lossless compression
- high order
- data compression
- adaptive binary arithmetic coding
- compression algorithm
- wavelet transform
- coding method
- evolvable hardware
- hardware implementation
- bit plane
- compression ratio
- higher order
- machine learning