A 16-Bit Reconfigurable Encryption Processor for p-Cipher.
Mohamed El-HadedyHristina MihajloskaDanilo GligoroskiAmit KulkarniDirk StroobandtKevin SkadronPublished in: IPDPS Workshops (2016)
Keyphrases
- ibm zenterprise
- advanced encryption standard
- block cipher
- encryption algorithms
- encryption algorithm
- s box
- processor core
- chaotic sequence
- ciphertext
- image encryption
- image encryption scheme
- cryptographic algorithms
- secret key
- reconfigurable architecture
- fault model
- stream cipher
- low cost
- general purpose
- encryption decryption
- encryption scheme
- hash functions
- pseudorandom
- digital signal
- high speed
- data encryption
- hardware implementation
- systolic array