An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation.

Tadayoshi Horita Itsuo Takanami

Published in: PDPTA (2009)

Keyphrases

fault tolerant
systolic array
fault tolerance
parallel architecture
distributed systems
reconfigurable architecture
high availability
load balancing
efficient implementation
data flow
state machine
hardware implementation
interconnection networks
fpga technology
energy function
high assurance
data model