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Poster: An Efficient Low Power & High Performance in MPSOC.
K. Jayasree
B. Naresh Kumar Reddy
B. Srinuvasu Kumar
J. V. N. Ramesh
Pranose J. Edavoor
Mohd Kashif Zia Ansari
Published in:
WCI (2015)
Keyphrases
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low power
power consumption
low power consumption
low cost
signal processor
high speed
single chip
vlsi architecture
wireless transmission
digital signal processing
high power
logic circuits
mixed signal
power reduction
cmos technology
image sensor
gate array
delay insensitive
highly efficient