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SEM-latch: a lost-cost and high-performance latch design for mitigating soft errors in nanoscale CMOS process.
Zhong-Li Tang
Chia-Wei Liang
Ming-Hsien Hsiao
Charles H.-P. Wen
Published in:
DAC (2022)
Keyphrases
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low power
power consumption
high density
design principles
design methodology
low power consumption
design process
single chip
case study
multi agent
wireless sensor networks
low cost
risk management
total cost