Evaluation time Estimation for Pass Transistor Logic circuits.

P. W. Chandana Prasad Bruce Mills Ali Assi S. M. N. Arosha Senanayake V. C. Prasad

Published in: DELTA (2006)

Keyphrases

logic circuits
low power
high speed
gate array
computer vision
low cost
functional decomposition
real time
image processing
image analysis
signal processing
tunnel diode