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Performance Analysis of Subthreshold 32-Bit Kogge-Stone Adder for Worst-Case-Delay and Power in Sub-micron Technology.
Himadri Singh Raghav
Sachin Maheshwari
B. Prasad Singh
Published in:
VDAT (2013)
Keyphrases
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worst case
power dissipation
cmos technology
power consumption
low voltage
upper bound
case study
lower bound
random access memory
rapid development
key technologies
average case
low power
personal computer
data flow
cost effective
greedy algorithm
error bounds
logic circuits
quality of service
computer systems