Login / Signup

High level quantitative interconnect estimation for Early Design Space Exploration.

Roel MeeuwsKamana SigdelYana YankovaKoen Bertels
Published in: FPT (2008)
Keyphrases
  • design space exploration
  • high level
  • design space
  • low level
  • computer architecture
  • hardware software partitioning
  • high speed
  • design process
  • machine learning
  • graphical models
  • high level synthesis