A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects.
Naveen KadayintiMaryam Shojaei BaghiniDinesh Kumar SharmaPublished in: VLSI Design (2017)
Keyphrases
- power dissipation
- high speed
- power consumption
- cmos technology
- low power
- analog vlsi
- circuit design
- duty cycle
- chip design
- low power consumption
- nm technology
- power reduction
- low cost
- evolvable hardware
- logic circuits
- power management
- digital signal processing
- high levels
- low voltage
- clock frequency
- input output
- single chip
- parallel processing