Optimization of VDD and VTH for low-power and high speed applications.

Koichi Nose Takayasu Sakurai

Published in: ASP-DAC (2000)

Keyphrases

low power
high speed
low cost
power consumption
wireless transmission
high power
single chip
vlsi circuits
low power consumption
vlsi architecture
digital signal processing
real time
logic circuits
power reduction
image sensor
mixed signal
hardware and software
cmos technology