VLSI friendly computation reduction scheme in H.264/AVC motion estimation.
Yiqing HuangSatoshi GotoTakeshi IkenagaPublished in: ISCAS (2008)
Keyphrases
- search range
- motion estimation
- video coding
- video encoder
- coding efficiency
- inter frame
- video compression standard
- rate distortion
- motion vectors
- inter mode decision
- high coding efficiency
- matching process
- low complexity
- video rate
- block matching
- mode selection
- variable block size
- motion estimator
- computational complexity
- macroblock
- image sequences
- video compression
- motion compensated
- video sequences
- motion compensation
- coding scheme
- error resilience
- high speed
- signal processing
- complexity reduction
- image coding
- spatial domain
- frame interpolation
- video codec
- bit rate
- stereo matching
- video coding standard
- optical flow
- block size
- reference frame
- number of search points
- video streams
- wavelet transform
- coded video
- motion model
- wyner ziv
- compression efficiency
- bitstream
- computer vision