A sub-1V dual-threshold domino circuit using product-of-sum logic.
Koji FujiiTakakuni DousekiYuichi KadoPublished in: ISLPED (2001)
Keyphrases
- digital circuits
- logic synthesis
- logic circuits
- delay insensitive
- life cycle
- modal logic
- chip design
- classical logic
- asynchronous circuits
- weighted sum
- analog circuits
- high speed
- truth table
- shift register
- flip flops
- proof theory
- automated reasoning
- steady state
- neural network
- product quality
- computational properties
- product development
- product design
- threshold selection
- probability theory
- square error
- production planning
- primal dual