Challenges in sleep transistor design and implementation in low-power designs.
Kaijian ShiDavid HowardPublished in: DAC (2006)
Keyphrases
- low power
- vlsi architecture
- single chip
- high speed
- cmos technology
- power consumption
- low cost
- power dissipation
- nm technology
- low power consumption
- ultra low power
- logic circuits
- digital signal processing
- gate array
- mixed signal
- design principles
- design space
- high power
- design process
- circuit design
- power reduction
- wireless transmission
- signal processor
- vlsi implementation
- image sensor
- design considerations
- analog to digital converter
- power saving
- real time
- bit rate