Rapid Triggering Capability Using an Adaptive Overlay during FPGA Debug.

Fatemeh Eslami Steven J. E. Wilton

Published in: ACM Trans. Design Autom. Electr. Syst. (2018)

Keyphrases

real time
data sets
hardware implementation
real time image processing
high speed
information retrieval
verilog hdl
database
neural network
image processing
low cost
hardware architecture
fpga implementation
novice programmers
parallel hardware