Fast low power translation lookaside buffers using hierarchical NAND match lines.

Lawrence T. Clark Vikas Chaudhary

Published in: ISCAS (2010)

Keyphrases

low power
low power consumption
low cost
power consumption
high speed
single chip
high power
digital signal processing
vlsi circuits
vlsi architecture
cmos technology
power dissipation
wireless transmission
image sensor
logic circuits
real time
power reduction
flash memory
gate array