A reconfigurable SOM hardware accelerator.
Mario PorrmannMarc FranzmeierHeiko KalteUlf WitkowskiUlrich RückertPublished in: ESANN (2002)
Keyphrases
- field programmable gate array
- low cost
- hardware implementation
- self organizing maps
- parallel computing
- embedded systems
- hardware architecture
- image processing algorithms
- hardware design
- real time
- computing systems
- competitive learning
- neural network
- hardware and software
- high end
- kohonen self organizing map
- topology preserving
- k means
- unsupervised learning
- computer systems
- signal processing
- massively parallel
- hardware software co design
- hardware software
- reconfigurable hardware
- general purpose processors
- heterogeneous computing
- parallel architectures
- kohonen self organizing maps
- growing self organizing map
- neural gas
- xilinx virtex
- digital signal
- compute intensive
- topology preservation
- general purpose
- computing power
- input space