A 3D system prototype of an eDRAM cache stacked over processor-like logic using through-silicon vias.
Matt WordemanJoel SilbermanGary W. MaierMichael ScheuermannPublished in: ISSCC (2012)
Keyphrases
- high density
- high speed
- memory hierarchy
- processor core
- cache misses
- embedded processors
- logic programming
- chip design
- memory subsystem
- main memory
- prefetching
- classical logic
- database
- field effect transistors
- multithreading
- integrated circuit
- database workloads
- low cost
- query processing
- memory bandwidth
- multiprocessor systems
- level parallelism
- random access memory
- low power
- modal logic
- parallel processing
- shared memory multiprocessors