Mixed-voltage I/O buffer using 0.35 μm CMOS technology.

Tzung-Je Lee Wei-Chih Chang Chua-Chin Wang

Published in: ICECS (2008)

Keyphrases

low voltage
cmos technology
low power
virtual memory
input output
power consumption
parallel processing
spl times
replacement policy
random access memory
file system
design considerations
high speed
mixed signal
power management
power dissipation
main memory
computer vision
video sequences