Power analysis for sequential circuits at logic level.

Matthias A. Senn Peter H. Schneider Bernd Wurth

Published in: EURO-DAC (1996)

Keyphrases

power analysis
logic synthesis
delay insensitive
digital circuits
logic circuits
high speed
countermeasures
asynchronous circuits
logic programming
smart card
chip design
data mining
sensor networks
low cost
efficient computation