A Novel Reconfigurable Computation Unit for DSP Applications.

Jer-Min Jou Yun-Lung Lee Chen-Yen Lin Chien-Ming Sun

Published in: ISVLSI (2007)

Keyphrases

systolic array
digital signal
low cost
signal processing
reconfigurable architecture
data sets
neural network
computer vision
image processing
efficient computation
computation intensive
data mining
general purpose
high speed
digital signal processing