Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks.
Yu CaiKen MaiOnur MutluPublished in: ISQED (2015)
Keyphrases
- comparative evaluation
- routing algorithm
- single chip
- network on chip
- network coding
- path selection
- network resources
- hardware implementation
- dynamic routing
- application specific integrated circuits
- high speed
- interconnection networks
- low cost
- wireless sensor networks
- field programmable gate array
- ad hoc networks
- shortest path
- packet delivery
- hardware architecture
- physical design
- routing protocol
- multipath
- general purpose processors
- low power
- qos routing
- energy consumption
- circuit design
- wireless ad hoc networks
- efficient implementation
- end to end delay
- integrated circuit
- xilinx virtex
- mobile nodes
- network structure
- network traffic
- computer networks
- design methodology
- text classification
- message overhead